SGDH wiki home
Design Study (SGDH) is a roadmap-first portal for hardware and FPGA learners.
It connects curated course links, wiki docs, community, and browser-based design tools so you can decide what to study next and try ideas immediately—without juggling unrelated template pages.
What you can do here
- Follow level-based paths (L1–L4) for design studies
- Browse courses by Language / FPGA / career tracks
- Open external courses (Inflearn, FastCampus, etc.) and check release status
- Join the Discord for Q&A and announcements
- Use the free tools below for docs-style work, synthesis, simulation, and radix math—no install
In-browser design tools (free)
Interactive tools maintained by SGDH. Each has a live tool page and a wiki guide.
- Verilog Simulator — Icarus Verilog in the browser, VCD waves. Guide
- Verilog Analyzer — Synthesis / FSM / schematic workflow. Guide
- Waveform Editor — WaveDrom-style timing diagrams. Guide
- Radix calculator — HEX/DEC/OCT/BIN, BigInt, bitwise ops. Guide
Most features work without sign-in; optional cloud slots may require login.
How to read the wiki vs courses
- Roadmap / course pages are guides that point to curricula and external video platforms—they are not empty link lists, but the actual video playback happens on each provider.
- Tool guides explain the real UI: layout, shortcuts, and Advanced options, updated when the tools change.
- We avoid pasting the same paragraphs across many URLs; substantive topics stay on one canonical page where possible.
Suggested order
- Open the full roadmap & courses overview.
- Pick the level band that matches you today.
- Start with open courses; watch “coming soon” items for release notes.
- Use the tools above to rehearse examples, waves, and synthesis-style checks alongside lectures.